Title :
Current-mode memory cell with power down phase for discrete time analog iterative decoders
Author :
Dlugosz, Rafal ; Gaudet, Vincent
Author_Institution :
Inst. of Microtechnol., Univ. of Neuchatel, Neuchatel, Switzerland
Abstract :
A low power, current-mode memory element for analog discrete time iterative decoders is proposed. In the circuit a high-speed power-down mechanism has been implemented that enables a significant increase of the operation speed without increasing the power dissipation. During the power down phase the data stored in the memory is maintained in the capacitor. The proposed memory element works at a sampling frequency of 10 MSps. During the normal operation the memory cell dissipates power of 1.5-muW, while in the standby phase 50-nW.
Keywords :
analogue storage; current-mode memory cell; current-mode memory element; discrete time analog iterative decoders; power dissipation; Analog memory; Capacitors; Circuits; Frequency; Iterative decoding; Joining processes; Parasitic capacitance; Parity check codes; Power dissipation; Sampling methods;
Conference_Titel :
Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
978-1-4244-1683-7
Electronic_ISBN :
978-1-4244-1684-4
DOI :
10.1109/ISCAS.2008.4541526
