Title :
A differentially-tuned CMOS LC VCO for low-voltage full-rate 10 Gb/s CDR circuit
Author :
Mukherjee, D. ; Bhattacharjee, Jaya ; Laskar, J.
Author_Institution :
Yamacraw Design Center, Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
A fully-integrated differentially-tuned CMOS LC voltage controlled oscillator (VCO) is presented. The VCO is designed in a 0.13 /spl mu/m standard digital CMOS process with a 1.2 V supply. It achieves a phase noise of -99 dBc/Hz at 1 MHz offset from a carrier frequency of 10 GHz and has a tuning range of 3.7 GHz with the core consuming only 3.6 mW of DC power. This satisfies the requirements of clock-and-data-recovery (CDR) circuits for 10 gigabit optical communication systems. This paper also investigates, for the first time, the circuit topologies of other building blocks for a fully-differential implementation of a closed loop full-rate CDR circuit with low supply voltage (1.2 V).
Keywords :
CMOS integrated circuits; MMIC oscillators; Q-factor; circuit tuning; digital communication; field effect MMIC; inductors; integrated circuit noise; optical communication equipment; phase noise; varactors; voltage-controlled oscillators; 0.13 micron; 1.2 V; 10 GHz; 10 Gbit/s; 3.6 mW; CMOS LC VCO; LC voltage controlled oscillator; clock/data recovery circuits; closed loop CDR circuit; differentially-tuned CMOS VCO; digital CMOS process; full-rate CDR circuit; fully-integrated LC VCO; gigabit optical communication systems; inductor design; phase noise; tuning range; varactor design; CMOS process; Circuit optimization; Circuit topology; Clocks; Frequency; Low voltage; Optical fiber communication; Optical tuning; Phase noise; Voltage-controlled oscillators;
Conference_Titel :
Microwave Symposium Digest, 2002 IEEE MTT-S International
Conference_Location :
Seattle, WA, USA
Print_ISBN :
0-7803-7239-5
DOI :
10.1109/MWSYM.2002.1011722