DocumentCode
1833088
Title
Adaptive error control for reliable systems-on-chip
Author
Yu, Qiaoyan ; Ampadu, Paul
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Rochester, Rochester, NY
fYear
2008
fDate
18-21 May 2008
Firstpage
832
Lastpage
835
Abstract
We present an adaptive error control scheme that employs a link quality grading technique and a burst error prediction mechanism, in order to handle multi-wire and multicycle errors, respectively. Our approach enables the transmitter to select the most effective error-control scheme for the particular link quality. Using this method, we can improve switch-to-switch throughput by 4X and reduce power consumption by 70%, compared to retransmission-only and retransmission-plus-fixed-coding approaches.
Keywords
adaptive control; integrated circuit reliability; system-on-chip; adaptive error control scheme; burst error prediction mechanism; link quality grading technique; reliable systems-on-chip; Adaptive control; Buffer storage; Energy consumption; Error correction; Error correction codes; Network-on-a-chip; Programmable control; Switches; Throughput; Transmitters;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
Conference_Location
Seattle, WA
Print_ISBN
978-1-4244-1683-7
Electronic_ISBN
978-1-4244-1684-4
Type
conf
DOI
10.1109/ISCAS.2008.4541547
Filename
4541547
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