DocumentCode
1833316
Title
Implantation Process for Removing a Reflection Inside a Circuit
Author
Stinehelfer, Harold E.
Author_Institution
Raytheon Bedford Laboratories, Bedford, MA 01730
Volume
11
fYear
1987
fDate
31929
Firstpage
237
Lastpage
246
Abstract
This paper wi1l describe the use of implanting a theoretical reflection inside an experimental measurement to remove a junction capacitance. Time domain analysis will be used to examine what is happening inside the circuit using the frequency domain representation for the "Implant". The implant process is performed on a set of measurements to allow more detailed examination of the circuit. The theoretical circuit can be capacitive, inductive or an impedance change at a given location. This technique can allow the measured date to be experimentally changed. The procees is less expensive and faster than making physical tuning changes.
Keywords
Antenna measurements; Capacitance measurement; Coaxial components; Connectors; Delay; Impedance measurement; Phase frequency detector; RLC circuits; Reflection; Stripline;
fLanguage
English
Publisher
ieee
Conference_Titel
ARFTG Conference Digest-Spring, 29th
Conference_Location
Las Vegas, NV, USA
Print_ISBN
0-7803-5686-1
Type
conf
DOI
10.1109/ARFTG.1987.323869
Filename
4119427
Link To Document