DocumentCode
1833322
Title
Automatic communication refinement for system level design
Author
Abdi, Samar ; Shin, Dongwan ; Gajski, Daniel
Author_Institution
Center for Embedded Comput. Syst., Univ. of California, Irvine, CA, USA
fYear
2003
fDate
2-6 June 2003
Firstpage
300
Lastpage
305
Abstract
This paper presents a methodology and algorithms for automatic communication refinement. The communication refinement task in system-level synthesis transforms abstract data-transfer between components to its actual bus level implementation. The input model of the communication refinement is a set of concurrently executing components, communicating with each other through abstract communication channels. The refined model reflects the actual communication architecture. Choosing good communication architecture in system level design requires sufficient exploration through evaluation of various architectures. However, this would not be possible with manually refining the system model for each communication architecture. For one, manual refinement is tedious and error-prone. Secondly, it wastes substantial amount of precious designer time. We solve this problem with automatic model refinement. We also present a set of experimental results to demonstrate how the proposed approach works on a typical system level design.
Keywords
circuit simulation; embedded systems; hardware-software codesign; integrated circuit design; modelling; protocols; system buses; automatic communication refinement; bus level implementation; communication architecture; concurrently executing components; system level design; Algorithm design and analysis; Automatic testing; Computer architecture; Embedded computing; Modeling; Permission; Space exploration; System buses; System testing; System-level design;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2003. Proceedings
Print_ISBN
1-58113-688-9
Type
conf
DOI
10.1109/DAC.2003.1219013
Filename
1219013
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