DocumentCode :
1833726
Title :
Impacting electronic package design by validated simulations
Author :
Sarihan, Vijay ; Guo, Yifan ; Lee, Tom ; Teng, Sue
Author_Institution :
AISL, Motorola Inc., Tempe, AZ, USA
fYear :
1998
fDate :
25-28 May 1998
Firstpage :
330
Lastpage :
335
Abstract :
Numerical methods are being used extensively for predicting mechanical and thermal response of electronic interconnect systems and packages. New challenges are being faced as the regime of predictable response is being expanded. These new challenges can range from incorporating complex time dependent material response prediction, interconnect reliability prediction to micromachined sensor response to extreme environmental inputs. Very often we are treading close to the unknown or predicting response by making certain assumptions and simplifications that enable us to make the predictions. Being aware of these assumptions and verifying the regime of uncertainty then is fundamental to simulation validation
Keywords :
deformation; light interferometry; numerical analysis; packaging; simulation; thermal analysis; deformation response; electronic package design; moire interferometry; package response predictions; thermal characterisation; validated simulations; Conducting materials; Electronic packaging thermal management; Electronics packaging; Flip chip; Interferometry; Semiconductor device measurement; Semiconductor device packaging; Thermal conductivity; Time factors; Uncertainty;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components & Technology Conference, 1998. 48th IEEE
Conference_Location :
Seattle, WA
ISSN :
0569-5503
Print_ISBN :
0-7803-4526-6
Type :
conf
DOI :
10.1109/ECTC.1998.678715
Filename :
678715
Link To Document :
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