• DocumentCode
    1833869
  • Title

    Leading-edge and future design challenges - is the classical EDA ready?

  • Author

    Spirakis, Greg

  • Author_Institution
    Intel Corp., Santa Clara, CA, USA
  • fYear
    2003
  • fDate
    2-6 June 2003
  • Firstpage
    416
  • Abstract
    Current design tools are lagging behind and, in some cases, slowing the growth of the VLSI market. Disruptive design methods are necessary to bridge the gap. Abstraction and re-use are believed to be the most promising approaches. However, difficult open questions still exist in this new flow. In particular, how a high-level design can be transformed into an implementation while ensuring full (formal) verification of the correspondence between the models.
  • Keywords
    electronic design automation; formal verification; hardware description languages; high level languages; EDA; VLSI; disruptive design methods; formal verification; high-level modeling; Bridges; Convergence; Design automation; Design methodology; Educational institutions; Electronic design automation and methodology; Logic design; Permission; Research and development; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2003. Proceedings
  • Print_ISBN
    1-58113-688-9
  • Type

    conf

  • DOI
    10.1109/DAC.2003.1219036
  • Filename
    1219036