• DocumentCode
    1833898
  • Title

    Design of Class-E power VCO in 65nm CMOS technology: Application to RF transmitter architecture

  • Author

    Deltimple, Nathelie ; Deval, Yann ; Belot, Didier ; Kerhervé, Eric

  • Author_Institution
    IMS Lab., Univ. de Bordeaux, Talence
  • fYear
    2008
  • fDate
    18-21 May 2008
  • Firstpage
    984
  • Lastpage
    987
  • Abstract
    This paper investigates the feasibility of designing a RF TX architecture based on a Power VCO, operating at 1.95 GHz for UMTS/WCDMA standard. The Power VCO uses 2.5 V supply voltage and is designed using 65 nm CMOS technology from ST Microelectronics. The Power VCO is made up of an oscillating Power Amplifier (PA). In order to fulfil UMTS/W-CDMA requirements, especially on output power with regards to efficiency to save battery life, the used PA is a two-stage Class E PA. The output 1 dB compression point (CP1) is 22 dBm and Power Added Efficiency (PAE) @CP1 is 55.1%. This PA is then included in a loop to realize oscillation condition. The Power VCO oscillates @ 1.95 GHz, achieves an output power of 23.3 dBm with 60.3% PAE.
  • Keywords
    CMOS integrated circuits; power amplifiers; transceivers; CMOS technology; RF transmitter; class-E power VCO; oscillating Power Amplifier; power added efficiency; 3G mobile communication; CMOS technology; Microelectronics; Multiaccess communication; Power amplifiers; Power generation; Radio frequency; Transmitters; Voltage; Voltage-controlled oscillators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
  • Conference_Location
    Seattle, WA
  • Print_ISBN
    978-1-4244-1683-7
  • Electronic_ISBN
    978-1-4244-1684-4
  • Type

    conf

  • DOI
    10.1109/ISCAS.2008.4541585
  • Filename
    4541585