Investigation of crosstalk among vias

Crosstalk among vias is a critical problem in high-speed digital circuits, deteriorating signal quality and increasing jitter, especially when circuit density is high. Underlying mechanism of crosstalk among vias is investigated in this paper. Using a physics-based equivalent circuit model, crosstalk as a function of various geometrical parameters, including parallel plane pair thickness, layer count in printed circuit board (PCB) stackup, ground via patterns, and parallel plane pair dimensions, has been investigated. A multi-step crosstalk evaluation procedure is proposed based on the study for PCB layout-design verifications.