DocumentCode
1833992
Title
“Time borrowing” technique for design of low-power high-speed multi-modulus prescaler in frequency synthesizer
Author
Yuan, Quan ; Yang, Hai-gang ; Dong, Fang-yuan ; Yin, Tao
Author_Institution
Inst. of Electron., Chinese Acad. of Sci., Beijing
fYear
2008
fDate
18-21 May 2008
Firstpage
1004
Lastpage
1007
Abstract
A low power continuous phase-switching multi-modulus prescaler is proposed, based on a so called "time borrowing" method. This novel phase-switching control strategy significantly reduces the delay of the phase-switching control loop so the multi-modulus prescaler can work with higher input frequencies and obtain the maximum modulus for a lower power supply. According to the measurement results, such a multi-modulus prescaler fabricated in a 0.35 mum CMOS process divides the 2.4 GHz input frequency by 48 up to 64 for a minimum power supply voltage of 2.5 V. Its maximum power dissipation is only 4.85 mW. Compared with some other CMOS multi-modulus prescalers reported lately, our design has demonstrated a considerable improvement in terms of the power-to-speed ratio.
Keywords
CMOS analogue integrated circuits; frequency synthesizers; high-speed integrated circuits; integrated circuit design; low-power electronics; prescalers; CMOS multimodulus prescalers; CMOS process; continuous phase-switching multimodulus prescaler; frequency 2.4 GHz; frequency synthesizer; low-power high-speed multimodulus prescaler; phase-switching control loop; phase-switching control strategy; power 4.85 mW; size 0.35 mum; time borrowing technique; voltage 2.5 V; Clocks; Delay; Flip-flops; Frequency conversion; Frequency synthesizers; Intelligent networks; Logic; Power supplies; Switches; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
Conference_Location
Seattle, WA
Print_ISBN
978-1-4244-1683-7
Electronic_ISBN
978-1-4244-1684-4
Type
conf
DOI
10.1109/ISCAS.2008.4541590
Filename
4541590
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