DocumentCode
1834010
Title
A 6-Bit, 1.2-GS/s ADC with wideband THA in 0.13-μm CMOS
Author
Chen, Bo-Wei ; Hsien, Szu-Kang ; Chiang, Cheng-Shiang ; Juang, Kai-Cheung
Author_Institution
Syst.-on-Chip Technol. Center, Ind. Technol. Res. Inst., Hsinchu
fYear
2008
fDate
3-5 Nov. 2008
Firstpage
381
Lastpage
384
Abstract
This paper presents a 6-bit, 1.2-GSample/s flash ADC with new proposed wideband track-and-hold amplifier (THA) fabricated in TSMC 0.13-mum CMOS technology. The wideband THA employs a front-end super source follower (SSF), which has a very low input capacitance of only 0.2-pf, to boost analog bandwidth without any on-chip passive inductor. Moreover, the flatness of the data bandwidth of ADC will improve. The SSF can also relax the power consumption of the voltage buffer in the THA.
Keywords
CMOS integrated circuits; analogue-digital conversion; sample and hold circuits; wideband amplifiers; TSMC CMOS technology; flash ADC; front-end super source follower; power consumption; size 0.13 mum; storage capacity 6 bit; voltage buffer; wideband track-and-hold amplifier; Bandwidth; CMOS technology; Circuits; Clocks; Energy consumption; Inductors; Paper technology; Preamplifiers; Voltage; Wideband;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2008. A-SSCC '08. IEEE Asian
Conference_Location
Fukuoka
Print_ISBN
978-1-4244-2604-1
Electronic_ISBN
978-1-4244-2605-8
Type
conf
DOI
10.1109/ASSCC.2008.4708807
Filename
4708807
Link To Document