DocumentCode
1834025
Title
Solving the latch mapping problem in an industrial setting
Author
Ng, Kelvin ; Prasad, Mukul R. ; Mukherjee, Rajarshi ; Jain, Jawahar
Author_Institution
Dept. of Comput. Sci., British Columbia Univ., Vancouver, BC, Canada
fYear
2003
fDate
2-6 June 2003
Firstpage
442
Lastpage
447
Abstract
We describe a complete method for the latch mapping problem that is based on the efficient integration of previously proposed techniques for latch mapping as well as novel optimizations for further improvement. The highlights of the proposed approach include a new method of integrating complete methods and incomplete methods for latch mapping, the use of incremental reasoning to optimize the overall algorithm and the use of a conventional combinational equivalence checking tool as the core engine. Experiments confirm that the proposed method retains much of the efficiency and capacity of incomplete methods while providing the completeness of complete methods and derives significant performance improvements form the proposed optimizations.
Keywords
circuit CAD; combinational circuits; equivalence classes; formal verification; combinational equivalence checking tool; incremental reasoning; latch mapping problem; optimizations; verification; Circuits; Computational modeling; Computer science; Engines; Formal verification; Kelvin; Laboratories; Latches; Optimization methods; Permission;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2003. Proceedings
Print_ISBN
1-58113-688-9
Type
conf
DOI
10.1109/DAC.2003.1219042
Filename
1219042
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