Title :
Process modeling for sequential build-up of multi-layered structures
Author :
Dunne, Rajiv C. ; Sitaraman, Suresh K.
Author_Institution :
George W. Woodruff Sch. of Mech. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
A parametric process modeling approach has been implemented to simulate the sequential build-up of a multilayered substrate. Generalized deformation models with element birth and death are used to activate and deactivate the material layers to simulate substrate fabrication. Using process models, one can determine the warpage stresses at any intermediate stage in the process. This approach is in contrast to the “frozen-view” models employed by many researchers, which are shown to yield overly conservative and sometimes erroneous results, leading to non-optimal design solutions. Residual warpage and axial stress results are presented for the sequential build-up of a complex multi-layered substrate with thin film passives integrated within the HDI (high density interconnect) layers. In addition, a comparison with the results using a frozen-view modeling approach is presented, and an alternate improved substrate processing technique is suggested to eliminate intermediate boards prior to polymer deposition
Keywords :
deformation; integrated circuit interconnections; integrated circuit modelling; integrated circuit packaging; internal stresses; HDI; axial stress; deformation models; frozen-view modeling approach; high density interconnect; multi-layered structures; parametric process modeling; polymer deposition; sequential build-up; substrate fabrication; warpage stresses; Costs; Deformable models; Electronics packaging; Fabrication; Polymers; Residual stresses; Substrates; Temperature; Thermal stresses; Thermomechanical processes;
Conference_Titel :
Electronic Components & Technology Conference, 1998. 48th IEEE
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-4526-6
DOI :
10.1109/ECTC.1998.678718