SiP2.0: What, when, and how?

Up to now, SiP integration is widely used to increase chip integration density as well as flexibility of combination in heterogeneous devices. Emerging integration and stacking technologies such as 3D integration, TSV (Through Silicon Via), die-to-die proximity communications, EAD (Embedded Active Devices) are becoming greater attention. If we call the first generation SiP integration as “SiP1.0”, what is “SiP2.0” ? When and how is it practical? Each panelists will give their anticipation of future SiP, or “SiP2.0”. This panel talk is not an “A vs. B” type of debate, but more like an evening talk where each panelist presents their visions on the next generation SiP.