A reconfigurable signal processing IC with embedded FPGA and multiport Flash memory

Author

Cali, L. ; De Sandre, G. ; Pasotti, M. ; Rolandi, P.L.

fYear

2003

fDate

2-6 June 2003

Firstpage

691

Lastpage

695

Abstract

A 1GOPS dynamically reconfigurable processing unit with embedded Flash memory and SRAM-based FPGA targets image-voice processing and recognition applications. Code, data, and FPGA bitstreams are stored in the embedded Flash memory and are independently accessible through 3 content-specific, 64-bit I/O ports with a peak read rate of 1.2GB/s. The system is implemented in a 0.18μm, 2PL-6ML CMOS Flash technology, chip area is 70mm².

Keywords

digital signal processing chips; field programmable gate arrays; flash memories; integrated circuit design; reconfigurable architectures; 0.18 micron; 1.2 Gbit/s; 64 bit; ASIC; CMOS Flash technology; FPGA bitstream; Flash memory; I/O port; SRAM-based FPGA target; application specific integrated circuit; code bitstream; complementary metal oxide semiconductor; data bitstream; digital signal processors; embedded FPGA; field programmable gate array; image-voice processing; multiport flash memory; read rate; recognition application; reconfigurable architecture; reconfigurable integrated circuit; reconfigurable processing unit; signal processing IC; static random access memory; CMOS technology; Field programmable gate arrays; Flash memory; Hardware; Integrated circuit technology; Microprocessors; Programmable logic arrays; Programmable logic devices; Signal processing; Signal processing algorithms;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2003. Proceedings

Print_ISBN

1-58113-688-9

Type

conf

DOI

10.1109/DAC.2003.1219107

Filename

1219107