Title :
Formal verification - prove it or pitch it
Author_Institution :
University of California at San Diego
Keywords :
Chip scale packaging; Costs; Formal verification; Graphics; Humans; Microprocessors; Productivity; Solid modeling; Testing; Very large scale integration;
Conference_Titel :
Design Automation Conference, 2003. Proceedings
Print_ISBN :
1-58113-688-9
DOI :
10.1109/DAC.2003.157436
