DocumentCode
1835160
Title
Enhanced multi-bit delta-sigma modulator with two-step pipeline quantizer
Author
Rajaee, Omid ; Moon, Un Ku
Author_Institution
Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR
fYear
2008
fDate
18-21 May 2008
Firstpage
1212
Lastpage
1215
Abstract
A new delta-sigma analog-to-digital converter (ADC) is presented in this paper. A two-step pipeline ADC is used as the quantizer of this delta-sigma modulator to reduce the quantization noise at the output of the modulator. The proposed structure relaxes the output swing and gain requirements of the integrators. In addition, the front-end DAC of the proposed modulator is simplified. Simulation results verify the effectiveness of the proposed architecture.
Keywords
analogue-digital conversion; delta-sigma modulation; analog-to-digital converter; delta-sigma modulator; output swing; quantization noise; two-step pipeline quantizer; Circuit noise; Delta modulation; Digital modulation; Filters; Multi-stage noise shaping; Noise cancellation; Noise reduction; Noise shaping; Pipelines; Quantization;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
Conference_Location
Seattle, WA
Print_ISBN
978-1-4244-1683-7
Electronic_ISBN
978-1-4244-1684-4
Type
conf
DOI
10.1109/ISCAS.2008.4541642
Filename
4541642
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