DocumentCode
1835777
Title
Load-pull simulation for large signal GaAsFET
Author
Lingling, Sun ; Xiane, Chen
Author_Institution
Center of Computer-aided Eng., Hangzhou Inst. of Electron. Eng., China
fYear
1995
fDate
24-28 Oct 1995
Firstpage
601
Lastpage
603
Abstract
In this paper, we introduce a method for simulating load-pull characterization of GaAsFET. A procedure has been developed which is capable of searching for the optimum load impedance, calculating output power performance and plotting power contours on the output impedance plane for a GaAsFET in terms of its DC I/V and small signal device model. It can be used in the design of power amplifiers
Keywords
III-V semiconductors; gallium arsenide; power MESFET; semiconductor device models; DC I/V characteristics; GaAs; large signal GaAs FET; load impedance; load-pull simulation; output impedance; output power; power amplifier design; power contours; small signal device model; Circuit simulation; Computational modeling; Extraterrestrial measurements; Impedance; Power amplifiers; Power engineering and energy; Power engineering computing; Power generation; Radio frequency; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology, 1995 4th International Conference on
Conference_Location
Beijing
Print_ISBN
0-7803-3062-5
Type
conf
DOI
10.1109/ICSICT.1995.503364
Filename
503364
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