DocumentCode
1835880
Title
Temporofunctional crosstalk noise analysis
Author
Chai, Donald ; Kondratyev, Alex ; Ran, Yajun ; Tseng, Kenneth H. ; Watanabe, Yosinori ; Marek-Sadowska, Malgorzata
Author_Institution
Dept. of EECS, California Univ., Berkeley, CA, USA
fYear
2003
fDate
2-6 June 2003
Firstpage
860
Lastpage
863
Abstract
Noise affects circuit operation by increasing gate delays and causing latches to capture incorrect values. This paper proposes a method of characterizing correlation of signal transitions in multiple nets by considering both timing and functionality of the signals, and uses it in an analysis procedure to eliminate noise faults that cannot actually happen when such correlations are considered. It uses four-variable Boolean logic to characterize signal transitions in a time interval, and formulates Boolean satisfiability between aggressors and a victim under the min-max delay model for gates. The technique has been successfully applied to commercial ASIC designs and has eliminated up to 35% of delay noise faults reported by a state-of-the-art noise analysis tool.
Keywords
Boolean algebra; computability; crosstalk; electric noise measurement; integrated circuit design; integrated circuit noise; integrated circuit testing; ASIC design; Boolean satisfiability; SAT logic; circuit operation; delay model; gate delay; noise fault; signal functionality; signal timing; signal transition correlation; temporofunctional crosstalk noise analysis; time interval; timed Boolean logic; Boolean functions; Circuit faults; Circuit noise; Crosstalk; Delay; Integrated circuit noise; Logic circuits; Noise reduction; Signal analysis; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2003. Proceedings
Print_ISBN
1-58113-688-9
Type
conf
DOI
10.1109/DAC.2003.1219140
Filename
1219140
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