Title :
Thermal stability of WSi2 polycide structures for 1 Gbit DRAMs
Author :
Gambino, J.P. ; Weybright, M. ; Faltermeier, J. ; Domenicucci, A.
Author_Institution :
IBM Corp., Hopewell Junction, NY, USA
Abstract :
WSi2 polycide structures have been studied as a function of silicide thickness, anneal temperature, and anneal ambient. Silicon inclusions and agglomeration of WSi2 are observed during high temperature anneals (1050°C and above), resulting in rough interfaces and an increase in sheet resistance. Enhanced low temperature oxidation of the WSi2 results in oxide protrusions along the gate stack sidewalls, and can cause wordline-to-bitline leakage and open bitline contacts in a self-aligned contact process. Agglomeration and oxide protrusions can be minimized by using appropriate anneal conditions
Keywords :
DRAM chips; annealing; inclusions; integrated circuit interconnections; integrated circuit metallisation; integrated circuit testing; interface roughness; leakage currents; oxidation; thermal stability; tungsten compounds; 1 Gbit; 1050 C; DRAMs; Si; Si inclusions; WSi2; WSi2 polycide structures; agglomeration; anneal ambient; anneal conditions; anneal temperature; gate stack sidewalls; high temperature anneal; low temperature oxidation; open bitline contacts; oxide protrusions; rough interfaces; self-aligned contact process; sheet resistance; silicide thickness; thermal stability; wordline-to-bitline leakage; Circuit stability; Etching; Microstructure; Oxidation; Random access memory; Rapid thermal annealing; Scanning electron microscopy; Silicides; Temperature; Thermal stability;
Conference_Titel :
Interconnect Technology Conference, 1998. Proceedings of the IEEE 1998 International
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-4285-2
DOI :
10.1109/IITC.1998.704916
