Title :
A 60GHz LNA with 4.7dB NF and 18dB gain using interstage impedance matching technique in 90nm CMOS
Author :
Wang, Cetian ; Hao, Yang ; Haiying, Zhang ; Kang, Kai ; Tang, Zongxi
Author_Institution :
Univ. of Electron. Sci. & Technol. of China, Chengdu, China
Abstract :
A three stages 60GHz low noise amplifier (LNA) is implemented in 90nm CMOS process. An interstage impedance matching technique is adopted to reduce noise figure and improve gain. The LNA, which consists of two common source stages followed by a cascode stage, has a peak gain of 18dB at about 60GHz with a minimum noise figure (NF) of 4.7dB, especially, the NF below 5dB over the frequency band of 57-67GHz. Additionally, the input/output return loss is better than 19dB. It consumes 23.6mA from a 1.2V supply. The total LNA die area with pads is 0.8 × 0.8mm2 including pad area.
Keywords :
CMOS analogue integrated circuits; impedance matching; low noise amplifiers; CMOS; LNA die area; cascode stage; current 23.6 mA; frequency 60 GHz; frequency band; gain 18 dB; input return loss; interstage impedance matching technique; low noise amplifier; noise figure; noise figure 4.7 dB; output return loss; peak gain; size 90 nm; voltage 1.2 V; CMOS integrated circuits; CMOS technology; Gain; Impedance matching; Noise; Noise figure; CPW; Interstage impedance matching technique; LNA; SNIM;
Conference_Titel :
Microwave Technology & Computational Electromagnetics (ICMTCE), 2011 IEEE International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-8556-7
DOI :
10.1109/ICMTCE.2011.5915509
