Title :
Single-ended pass transistor logic for low-power design
Author :
Munteanu, Mihai ; Bogdan, Istvan ; Ivey, P. ; Powell, Neil ; Psilogeorgopoulos, Marios ; Seed, Luke ; Chuang, Tzung Shim
Author_Institution :
Dept. of Electron. & Electr. Eng., Sheffield Univ., UK
Abstract :
We show that SPL (single-ended pass transistor logic) is a promising logic style for low power design especially for arithmetic functions. SPL uses mainly NMOS transistors, the layout is compact, simple and regular (only 10 library cells required) but synthesis is more difficult. We compare SPL (using single and split supply voltages) with CPL and CMOS circuits for standard elements using a commercial 0.35 /spl mu/m process. SPL is better by up to 3x in power and 2x in area. We also discuss the limitations and difficulties of SPL and possible solutions.
Keywords :
CMOS logic circuits; MOSFET; adders; digital arithmetic; logic design; 0.35 micron; CMOS circuits; CPL circuits; NMOS transistors; SPL; arithmetic functions; compact layout; full adders; library cells; low power design; ripple carry adders; single supply voltage; single-ended pass transistor logic; split supply voltage; standard elements; Arithmetic; CMOS logic circuits; Circuit simulation; Circuit synthesis; Delay; Inverters; Libraries; Logic circuits; Logic design; Threshold voltage;
Conference_Titel :
Signals, Systems, and Computers, 1999. Conference Record of the Thirty-Third Asilomar Conference on
Conference_Location :
Pacific Grove, CA, USA
Print_ISBN :
0-7803-5700-0
DOI :
10.1109/ACSSC.1999.832353
