• DocumentCode
    1836305
  • Title

    Performance improvement of all digital phase-locked loop with adaptive multilevel-quantized phase comparator

  • Author

    Nakajima, Osamu ; Hikawa, Hiroomi ; Mori, Shinsaku

  • Author_Institution
    Dept. of Electr. Eng., Keio Univ., Yokohama, Japan
  • fYear
    1988
  • fDate
    7-9 June 1988
  • Firstpage
    603
  • Abstract
    A type of phase comparator for digital phase-locked loops, called the adaptive multilevel quantized phase comparator (AMPC), is proposed. The phase comparison characteristics of this proposed comparator operate adaptively, by shifting them up or down and by changing the scale, following the frequency deviation and the phase jitter of the input signals. The performances of the AMPC and the loop with AMPC are obtained theoretically and verified by computer simulation. As a result, the loop with this AMPC has a much wider locking-range and a much better jitter suppression effect than those of the conventional loop, as well as an improved steady-state phase error.<>
  • Keywords
    digital circuits; phase comparators; phase-locked loops; AMPC; adaptive multilevel-quantized phase comparator; computer simulation; digital phase-locked loop; frequency deviation; jitter suppression; locking-range; phase comparison characteristics; phase jitter; steady-state phase error; Communication systems; Computer errors; Computer simulation; Filters; Frequency; Jitter; Magnetooptic recording; Phase detection; Phase locked loops; Steady-state;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1988., IEEE International Symposium on
  • Conference_Location
    Espoo, Finland
  • Type

    conf

  • DOI
    10.1109/ISCAS.1988.14998
  • Filename
    14998