• DocumentCode
    1836478
  • Title

    Efficient fully-floating double-sampling integrator for ΔΣ ADCs

  • Author

    Lee, Kyehyung ; Chae, Jeongseok ; Temes, Gabor C.

  • Author_Institution
    Sch. of Electr. Eng. & Comput. Sci., Oregon State Univ., Corvallis, OR
  • fYear
    2008
  • fDate
    18-21 May 2008
  • Firstpage
    1440
  • Lastpage
    1443
  • Abstract
    A novel double-sampling integrator is proposed, which is insensitive to path mismatch, and does not introduce a detrimental extra factor into the loop gain. It allows the use of efficient design methods for DeltaSigma ADCs.
  • Keywords
    analogue-digital conversion; delta-sigma modulation; integrating circuits; DeltaSigma ADC; analog-to-digital converter; fully-floating double-sampling integrator; loop gain; path mismatch; Bandwidth; Baseband; Capacitors; Circuit stability; Computer science; Design methodology; Feedback loop; Sampling methods; Stability analysis; Transfer functions;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
  • Conference_Location
    Seattle, WA
  • Print_ISBN
    978-1-4244-1683-7
  • Electronic_ISBN
    978-1-4244-1684-4
  • Type

    conf

  • DOI
    10.1109/ISCAS.2008.4541699
  • Filename
    4541699
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1836478