Title :
Robust focal-plane analog processing hardware for dynamic texture segmentation
Author :
Fernandez-Berni, J. ; Carmona-Galan, R.
Author_Institution :
Inst. of Microelectron. of Seville (IMSE-CNM), Univ. de Sevilla, Seville, Spain
Abstract :
Cellular Nonlinear Networks (CNN) establish a theoretical framework in which programmable focal-plane image processing arrays can be developed. The conventional support for its analog programmability in VLSI is the implementation of transconductor-based multiplication of the input, output and state variables times the corresponding template elements. However, some distributions of weights can be greatly affected by the intrinsic nonidealities of the physical implementation. This is exactly the case when implementing linear diffusion within a transconductor-based CNN implementation. In this paper we propose an alternative implementation: a resistive grid based on MOSFETs operating in the triode region to realize linear diffusion of the input image, considered as the initial state of the network. In addition, these MOS-resistors can be employed as switches in order to sub-divide the image into bins, sized to track features on the appropriate scale. Thus, by simply controlling the size of the binning and for how long the pixel voltages will diffuse, it will be possible to segment and track dynamic textures along an image flow. Each frame of the flow is described by a smaller image in which each pixel represents the energy of the corresponding image bin, once the non-relevant spatial frequency components have been filtered out. We will demonstrate that the resulting low-resolution representation of the scene is very robust to the different sources of nonidealities in a standard CMOS technology.
Keywords :
MOSFET; VLSI; cellular neural nets; focal planes; image segmentation; image texture; programmable logic arrays; CMOS technology; MOS-resistors; MOSFET based resistive grid; VLSI; binning size controlling; cellular nonlinear networks; dynamic texture segmentation; image flow; linear diffusion; pixel voltages; programmable focal plane image processing arrays; robust focal plane analog processing hardware; spatial frequency components; track features; transconductor based multiplication; triode region; CMOS technology; Cellular networks; Cellular neural networks; Hardware; Image processing; Image segmentation; MOSFETs; Pixel; Robustness; Very large scale integration;
Conference_Titel :
Cellular Nanoscale Networks and Their Applications (CNNA), 2010 12th International Workshop on
Conference_Location :
Berkeley, CA
Print_ISBN :
978-1-4244-6679-5
DOI :
10.1109/CNNA.2010.5430250