A novel hardware acceleration technique for high performance parallel FDTD method

Author

Yu, Wenhua

Author_Institution

EMC Lab., Pennsylvania State Univ., University Park, PA, USA

fYear

2011

fDate

22-25 May 2011

Firstpage

441

Lastpage

444

Abstract

In this paper, we introduce one novel hardware acceleration technique based on a vector unit built in a regular CPU for high performance electromagnetic simulation. We investigate the performance of parallel FDTD method on the Intel and AMD processors accelerated by the Vector Arithmetic Logic Unit (VALU), high performance cluster, and Graphics Processing Unit (GPU). The FDTD method that is parallel in nature is one of the most popular numerical methods to simulate various electromagnetic problems and phenomena. Several examples are employed to demonstrate the engineering applications of parallel conformal FDTD method based on the VALU acceleration.

Keywords

computer graphic equipment; coprocessors; finite difference time-domain analysis; AMD processors; Intel processors; graphics processing unit; hardware acceleration technique; high performance cluster; high performance electromagnetic simulation; numerical methods; parallel conformal FDTD method; vector arithmetic logic unit; Acceleration; Computer architecture; Finite difference methods; Graphics processing unit; Time domain analysis; Workstations; FDTD; SSE; VALU; hardware acceleration;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Technology & Computational Electromagnetics (ICMTCE), 2011 IEEE International Conference on

Conference_Location

Beijing

Print_ISBN

978-1-4244-8556-7

Type

conf

DOI

10.1109/ICMTCE.2011.5915554

Filename

5915554