Investigation of HBT layout impact on fT doubler performance for 90nm SiGe HBTs

Author

Jain, V. ; Gross, B.J. ; Pekarik, J.J. ; Adkisson, J.W. ; Camillo-Castillo, R.A. ; Qizhi Liu ; Gray, P.B. ; Vallett, A. ; Divergilio, A.W. ; Zetterlund, B.K. ; Harame, D.L.

Author_Institution

IBM, Essex Junction, VT, USA

fYear

2014

fDate

Sept. 28 2014-Oct. 1 2014

Firstpage

5

Lastpage

8

Abstract

Peak f_T of 660 GHz is reported for HBT f_T doubler designs in IBM 90 nm SiGe BiCMOS technology 9HP. This high performance f_T doubler utilizes a longer HBT for output stage compared to the input stage HBT (length ratio 2:1) resulting in improved transconductance and lower thermal resistance. The impact of HBT layout on the circuit performance and trade-off between thermal resistance and f_T is also investigated. f_T doubler circuit can be used as a single transistor in several circuit applications like A/D converters and broadband circuits where higher performance is desired.

Keywords

BiCMOS integrated circuits; Ge-Si alloys; analogue-digital conversion; frequency multipliers; heterojunction bipolar transistors; thermal resistance; A/D converters; IBM SiGe BiCMOS technology; SiGe; SiGe HBT layout; broadband circuits; fT doubler circuit; frequency 660 GHz; lower thermal resistance; size 90 nm; transconductance; BiCMOS integrated circuits; Heterojunction bipolar transistors; Layout; Silicon germanium; Thermal resistance; BiCMOS; HBT; SiGe; fT doubler;

fLanguage

English

Publisher

ieee

Conference_Titel

Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), 2014 IEEE

Conference_Location

Coronado, CA

Type

conf

DOI

10.1109/BCTM.2014.6981274

Filename

6981274