Compact designs of mixcolumns and subbytes using a novel common subexpression elimination algorithm

Efficient hardware implementation of the advanced encryption standard (AES) is important due to its widespread applications. Applying a novel common subexpression elimination (CSE) algorithm to the two major transformations of the AES, mixcolumns and subbytes, we propose compact designs of the transformations. The hardware costs of our implementations are either the same as or smaller than those of prior works.