ASPA: Focal Plane digital processor array with asynchronous processing capabilities

Author

Lopich, Alexey ; Dudek, Piotr

Author_Institution

Sch. of Electr. & Electron. Eng., Univ. of Manchester, Manchester

fYear

2008

fDate

18-21 May 2008

Firstpage

1592

Lastpage

1595

Abstract

In this paper we present implementation and experimental results for a digital vision chip that operates in mixed asynchronous/synchronous mode. Mixed configuration benefits from full programmability (discrete-time mode) and high operational performance in global image processing operations (continuous-time mode) thus extending the application field of smart sensors from low- to medium-level processing. A 19x22 proof-of-concept chip was fabricated and tested. At peak operational frequency (150 MHz) each cell provides 9.6 MOPS thus achieving area utilization 820.8 MOPS/mm² and power efficiency 29 GOPS/W.

Keywords

digital signal processing chips; focal planes; image processing; image sensors; intelligent sensors; ASPA; asynchronous processing; digital vision chip; focal plane digital processor array; global image processing; mixed asynchronous-synchronous mode; smart sensor; Circuits; Clocks; Computer architecture; Data mining; Frequency; Image processing; Intelligent sensors; Parallel processing; Pixel; Registers;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on

Conference_Location

Seattle, WA

Print_ISBN

978-1-4244-1683-7

Electronic_ISBN

978-1-4244-1684-4

Type

conf

DOI

10.1109/ISCAS.2008.4541737

Filename

4541737