A new architecture for accurate dot product of floating point numbers

Many techniques were proposed to improve the accuracy of floating point operations such as addition, multiplication, and dot product. The purpose of such technique is to reduce the effect of rounding error. This paper introduces an efficient hardware implementation for accurate dot product. The proposed implementation was configured as a custom instruction in the ALTERA NiosII soft processor core. The computed result from the proposed method is as accurate as other algorithms and faster than them. Another advantage is that it has a linear time complexity, without any limitation on the vector length.