Asymmetric Regular Sampling PWM Pulse Generator Based FPGA

Aiming at cascade multilevel static reactive compensation device, this paper presents a SPWM pulse generating method Based on asymmetry regular sampling, and has developed a PWM pulse generator depending on the field programmable logic gate array (FPGA). Take multilevel cascade H bridge static reactive compensator as an example, it analyzes the pulse generating timing sequence of the asymmetry regular sampling, then introduces the basic principle and structure of the pulse generator and its implementation method. This PWM generator guarantees the asymmetry of the output voltage waveform being improved, also simplifies the circuit design and improves the reliability of the system at the same time.