DocumentCode :
1838240
Title :
On thermal stresses and reliability of a PBGA chip scale package
Author :
Hong, Bor Zen ; Su, Lo-Soun
Author_Institution :
Microelectron. Div., IBM Corp., Hopewell Junction, NY, USA
fYear :
1998
fDate :
25-28 May 1998
Firstpage :
503
Lastpage :
510
Abstract :
Thermomechanical analysis using the nonlinear finite element method was performed to study the thermal stresses and reliability problems of a flip chip plastic ball grid array (PBGA) chip scale package (CSP). The package under investigation has the fully populated PBGA solder joints in an array pitch of 1.27 mm. A cyclic temperature load of 0-100°C at a frequency of 2 cycles per hour was applied to the modeled package. The dependence of solder joint reliability on the CSP configuration and the use of mold compound was demonstrated for various chip sizes varying from 5 mm to 20 mm. The analysis results show that the chip-outline solder joint may fail earlier than any other solder joint in the modeled package. This confirms both experimental and modeling observations in the literature that the interior PBGA solder joint failure is mainly caused by the thermally induced warpage of organic-based package. It is contrary to the classical DNP theory used in predicting the fatigue failure location and mechanism of solder joints in the ceramic-based packages. The overmold flip chip PBGA chip scale package has a mean thermal fatigue life of the first failed solder joint that is approximately 1.2× that of the standard flip chip PBGA scale package without overmold
Keywords :
deformation; failure analysis; finite element analysis; integrated circuit packaging; integrated circuit reliability; plastic packaging; thermal analysis; thermal stress cracking; thermal stresses; 0 to 100 C; 1.27 mm; 5 to 20 mm; CSP configuration; PBGA chip scale package; chip scale package; flip chip package; mold compound; nonlinear finite element method; organic-based package; package reliability; plastic BGA package; plastic ball grid array; solder joint reliability; thermal fatigue life; thermal stresses; thermally induced warpage; thermomechanical analysis; Chip scale packaging; Electronics packaging; Fatigue; Finite element methods; Flip chip; Performance analysis; Plastics; Soldering; Thermal stresses; Thermomechanical processes;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components & Technology Conference, 1998. 48th IEEE
Conference_Location :
Seattle, WA
ISSN :
0569-5503
Print_ISBN :
0-7803-4526-6
Type :
conf
DOI :
10.1109/ECTC.1998.678740
Filename :
678740
Link To Document :
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