DocumentCode
1838712
Title
Infrastructure for successful BEOL characterization and yield ramp at the 65 nm node and below
Author
DeBord, Jeffrey R D ; Grice, Tom ; Garcia, Roberto ; Yeric, Greg ; Cohen, Ethan ; Sutandi, Augustinus ; Garcia, John ; Green, Gary
Author_Institution
Texas Instrum. Inc., Dallas, TX, USA
fYear
2005
fDate
6-8 June 2005
Firstpage
27
Lastpage
29
Abstract
BEOL yield characterization is increasingly difficult on advanced technology nodes using traditional short flow devices. A new BEOL technology development read only memory (TDROM™) has been used to successfully drive BEOL yield learning on the 65 nm node. The addressable nature of the TDROM™ allows isolation of all fails to within 2 um2 using known memory testing techniques which has resulted in accelerated yield learning, and PFA utilization. The eight megabit array size allows exhaustive DOE for all design rules and margins.
Keywords
integrated circuit yield; read-only storage; 65 nm; BEOL technology development read only memory; BEOL yield characterization; DOE; PFA utilization; TDROM; accelerated yield learning; array size; memory testing; yield ramp; Inorganic materials; Instruments; Isolation technology; Life estimation; Materials testing; Metallization; Metals industry; Read only memory; Vehicles; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Interconnect Technology Conference, 2005. Proceedings of the IEEE 2005 International
Print_ISBN
0-7803-8752-X
Type
conf
DOI
10.1109/IITC.2005.1499912
Filename
1499912
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