DocumentCode :
1838738
Title :
Low-damage damascene patterning of SiOC(H) low-k dielectrics
Author :
Struyf, H. ; Hendrickx, D. ; Olmen, J. Van ; Iacopi, F. ; Richard, O. ; Travaly, Y. ; Hove, M. Van ; Boullart, W. ; Vanhaelemeersch, S.
Author_Institution :
IMEC, Leuven, Belgium
fYear :
2005
fDate :
6-8 June 2005
Firstpage :
30
Lastpage :
32
Abstract :
Etch and strip plasma-induced damage is well-known to make the integration of sensitive low-k dielectrics in damascene schemes cumbersome. In this paper, three metal hardmask-based single-damascene patterning approaches are compared. EFTEM analysis and integrated k-value extraction show that the use of a metal hardmask-based scheme with optimized plasma chemistries and etch/strip sequencing results in very low damage to the SiOC(H) low-k dielectric.
Keywords :
dielectric materials; etching; integrated circuit technology; silicon compounds; EFTEM analysis; SiOC(H); SiOC(H) low-k dielectrics; etch damage; etch/strip sequencing; integrated k-value extraction; low-damage damascene patterning; metal hardmask-based patterning; optimized plasma chemistries; single-damascene patterning; strip plasma-induced damage; Dielectric losses; Etching; Lead compounds; Plasma applications; Plasma chemistry; Plasma materials processing; Polymer films; Resists; Strips; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Interconnect Technology Conference, 2005. Proceedings of the IEEE 2005 International
Print_ISBN :
0-7803-8752-X
Type :
conf
DOI :
10.1109/IITC.2005.1499913
Filename :
1499913
Link To Document :
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