Characterization and modeling of on-chip inductor substrate coupling effect

Author

Chuan-Jane Chao ; Shyh-Chyi Wong ; Chia-Jen Hsu ; Ming-Jer Chen ; Len-Yi Leu

Author_Institution

Inst. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

2002

fDate

3-4 June 2002

Firstpage

311

Lastpage

314

Abstract

The substrate coupling effects of two adjacent coplanar spiral inductors are characterized and modeled. The noise magnitude between two 45 /spl mu/m-away inductors can be reduced by 6.83 dB by using guard-ring surrounding each inductor, and improved by 10.28 dB further by adding patterned ground polysilicon shield beneath at 3 GHz. The inductor with patterned polysilicon shield beneath shows improved quality factor and noise isolation. Moreover, a macro model is presented for modeling quality factor and inductance of on-chip spiral inductor and associated neighboring inductor´s coupling noise effect.

Keywords

CMOS integrated circuits; Q-factor; S-parameters; equivalent circuits; field effect MMIC; inductors; integrated circuit modelling; integrated circuit noise; two-port networks; 3 GHz; CMOS technology; S-parameters; adjacent coplanar spiral inductors; equivalent circuit; guard-ring; inductance; macro model; monolithic RFIC; noise isolation; noise magnitude; on-chip inductor; patterned ground polysilicon shield; quality factor; substrate coupling effects; two-port measurements; CMOS technology; Coils; Dielectric substrates; Frequency; Inductance; Inductors; Q factor; Radiofrequency integrated circuits; Scattering parameters; Spirals;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits (RFIC) Symposium, 2002 IEEE

Conference_Location

Seattle, WA, USA

ISSN

1529-2517

Print_ISBN

0-7803-7246-8

Type

conf

DOI

10.1109/RFIC.2002.1012056

Filename

1012056