Impact of Cu barrier dielectrics upon stress-induced voiding of dual-damascene copper interconnects

Author

Ishikawa, Kensuke ; Shimazu, Hiromi ; Oshima, Takayuki ; Noguchi, Junji ; Tamaru, Tsuyoshi ; Aoki, Hideo ; Ando, Toshio ; Iwasaki, Tomio ; Saito, Tatsuyuki

Author_Institution

Micro Device Div., Hitachi, Ltd., Tokyo, Japan

fYear

2005

fDate

6-8 June 2005

Firstpage

39

Lastpage

41

Abstract

In this paper, we discuss the stress-induced voiding (SIV) in dual-damascene Cu interconnects. To relax the Cu stress and its gradient, we focused on the Cu barrier dielectrics. The SIV of Cu interconnects was successfully suppressed by using SiC film as a Cu barrier dielectric. The finite element method (FEM) and the molecular dynamics (MD) analysis revealed the stress distribution and its effects on the void growth.

Keywords

copper; dielectric thin films; finite element analysis; integrated circuit interconnections; integrated circuit reliability; molecular dynamics method; silicon compounds; stress relaxation; voids (solid); wide band gap semiconductors; Cu; FEM; SiC; barrier dielectric effects; dual-damascene interconnects; finite element method; molecular dynamics analysis; stress distribution; stress gradient relaxation; stress-induced voiding; void growth; Copper; Dielectric materials; Dielectric substrates; Materials reliability; Mechanical engineering; Silicon carbide; Tensile stress; Testing; Thermal stresses; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Interconnect Technology Conference, 2005. Proceedings of the IEEE 2005 International

Print_ISBN

0-7803-8752-X

Type

conf

DOI

10.1109/IITC.2005.1499916

Filename

1499916