Title :
Electrical evaluation of flip-chip package alternatives for next generation microprocessors
Author :
Darnauer, J. ; Schmidt, Benedikt ; Hanson, D.
Author_Institution :
Silicon Graphics, USA
Abstract :
Two styles of flip-chip packages for next-generation microprocessors were designed: a low-cost organic ball-grid-array (BGA) and a thin-film-on-ceramic land-grid array (LGA). Simultaneous switching output (SSO) noise, and core noise were measured. Although SSO was improved by a factor of two over the previous generation of packaging, core noise was still quite significant. We found that core noise is best managed by placing low-inductance capacitance close to the noise source, i.e. using on-chip capacitors, coupled planes in the package, or on-package bypass capacitors. Because of the lower impedance of its power planes, the ceramic package showed significantly better electrical performance than the organic. Addition of on-package bypass capacitors greatly narrows the gap between the two packages
Keywords :
flip-chip devices; integrated circuit noise; integrated circuit packaging; microprocessor chips; bypass capacitor; core noise; coupled plane; electrical characteristics; flip-chip package; next-generation microprocessor; on-chip capacitor; organic ball grid array; simultaneous switching output noise; thin-film-on-ceramic land grid array; Bandwidth; Capacitors; Ceramics; Copper; Costs; Electronics packaging; Frequency; Impedance; Microprocessors; Testing;
Conference_Titel :
Electronic Components & Technology Conference, 1998. 48th IEEE
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-4526-6
DOI :
10.1109/ECTC.1998.678769