DocumentCode
1839250
Title
MALU-an ALU with single period multiplication
Author
Li, Yongming ; Chen, Hongyi ; Yu, Zheng ; Chu, Tong ; Bian, Kun
Author_Institution
Inst. of Microelectron., Tsinghua Univ., Beijing, China
fYear
1995
fDate
24-28 Oct 1995
Firstpage
703
Lastpage
705
Abstract
An ALU design which can perform Mbit×Nbit multiplication within single instruction period is presented in this paper. The architecture, operation control and logic for this ALU are given. Logical and spice (with 2 μm CMOS technology) simulation results are also given. It can be used in MPUs and MCUs to enhance their computation capability
Keywords
CMOS logic circuits; multiplying circuits; 2 micron; ALU design; CMOS technology; MALU; MCU; MPU; SPICE simulation; architecture; logic; operation control; single period multiplication; Algorithm design and analysis; Arithmetic; CMOS technology; Digital signal processing; Digital signal processing chips; Gold; Hardware; Microprocessors; Signal processing; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology, 1995 4th International Conference on
Conference_Location
Beijing
Print_ISBN
0-7803-3062-5
Type
conf
DOI
10.1109/ICSICT.1995.503533
Filename
503533
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