Title :
Design space exploration of low-phase-noise LC-VCO using multiple-divide technique
Author :
Hara, Shoichi ; Ito, Takeshi ; Okada, Kenichi ; Matsuzawa, Akira
Author_Institution :
Dept. of Phys. Electron., Tokyo Inst. of Technol., Tokyo
Abstract :
This paper proposes a multiple-divide technique using by-2, by-3, and by-4 frequency dividers to realize a lower phase-noise LC-VCO, and explores the design space of low-phase-noise VCO using the multiple-divide technique. In the simulated results using 90-nm CMOS model parameters, the optimum frequency range, achieving better than -191dBc/Hz of FoM, can be extended from 6-12 GHz to 1.5-12 GHz.
Keywords :
CMOS integrated circuits; frequency dividers; phase noise; voltage-controlled oscillators; CMOS model parameters; design space exploration; frequency 1.5 GHz to 12 GHz; frequency 6 GHz to 12 GHz; frequency dividers; low-phase-noise LC-VCO; multiple-divide technique; CMOS technology; Circuits; Energy consumption; Frequency conversion; Inductors; Phase noise; Q factor; Radio frequency; Space exploration; Voltage-controlled oscillators;
Conference_Titel :
Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
978-1-4244-1683-7
Electronic_ISBN :
978-1-4244-1684-4
DOI :
10.1109/ISCAS.2008.4541830
