Title :
Defect size distribution in VLSI chips
Author_Institution :
IBM Corp., Manassas, VA, USA
Abstract :
VLSI patterns consisting of parallel lines of polysilicon with different spacings have been electrically tested. The number of observed shorts was found to be related to the line spacings by using an analytical model for the defect sensitive pattern areas. The distribution of defect sizes in the range from 0.5 to 1.4 mu m is proportional to x/sup -3/. The exponent value agrees with earlier distribution studies concerning defects several micrometers in size.<>
Keywords :
VLSI; integrated circuit technology; 0.5 to 1.4 micron; VLSI chips; VLSI patterns; analytical model; defect analysis; defect sensitive pattern areas; defect size distribution; different spacings; distribution of defect sizes; electrically tested; line spacings; number of observed shorts; parallel lines of polysilicon; polycrystalline Si lines; test structures; yield modelling; Analytical models; Artificial intelligence; Bismuth; Chemical processes; Chemical vapor deposition; Mathematical model; Pain; Size measurement; System testing; Very large scale integration;
Conference_Titel :
Microelectronic Test Structures, 1990. ICMTS 1990. Proceedings of the 1990 International Conference on
Conference_Location :
San Diego, CA, USA
DOI :
10.1109/ICMTS.1990.67880
