Title :
Acceleration of yield enhancement activity by utilizing real-time fail bitmap analysis
Author :
Shindo, Wataru ; Sugimoto, Satoru ; Makara, Reiji ; Rattanalangkan, Puttachai ; Lui, Richard
Author_Institution :
Fujitsu AMD Semicond. Ltd., Fukushima, Japan
Abstract :
A methodology to enhance baseline yield by utilizing fail bitmap (FBM) analysis is presented in this paper. Yield impact of each process step is estimated from FBM-defect correlation and FBM classification. Statistical accuracy of the data is evaluated by using actual wafer-to-wafer variation of our fab, and is significantly improved by increasing FBM sample size. In order to analyze a large amount of data in real-time manner, throughput of the data analysis is also enhanced by an automated system for timely data feedback to yield enhancement activities
Keywords :
failure analysis; integrated circuit yield; real-time systems; FBM classification; FBM-defect correlation; automated system; baseline yield enhancement; data feedback; real-time fail bitmap analysis; sample size; Acceleration; Circuits; Data analysis; Failure analysis; Fault diagnosis; Feedback; Real time systems; Tail; Throughput; Yield estimation;
Conference_Titel :
Semiconductor Manufacturing Symposium, 2001 IEEE International
Conference_Location :
San Jose, CA
Print_ISBN :
0-7803-6731-6
DOI :
10.1109/ISSM.2001.962965
