DocumentCode :
1839498
Title :
Design of ECP additive for 65 nm-node technology Cu BEOL reliability
Author :
Shih, C.H. ; Chou, S.W. ; Lin, C.J. ; Ko, T. ; Su, H.W. ; Wu, C.M. ; Tsai, M.H. ; Shue, Winston S. ; Yu, C.H. ; Liang, M.S.
Author_Institution :
Taiwan Semicond. Manuf. Co., Hsin-Chu, Taiwan
fYear :
2005
fDate :
6-8 June 2005
Firstpage :
102
Lastpage :
104
Abstract :
In this work, the design criteria of ECP additives on Cu BEOL reliability are revealed. By varying the ECP additive structures and concentrations, we demonstrate how gap filling performance and impurity level of the bulk copper can influence the electromigration lifetime and stress induced void (SIV) formation. It was found that the impurity in the grain boundary could act as an effective vacancy diffusion barrier to inhibit SIV formation. However, ECP additive conditions that produce highly impure Cu was found to increase the gap filling pits on top of the sub-micron features that would reduce the electromigration (EM) lifetime performance. By proper design of ECP additives, high impurity incorporation in the wide metal line without gap filling pit formation can be achieved. The stress SIV formation was inhibited with excellent EM resistance.
Keywords :
additives; copper; diffusion barriers; electromigration; integrated circuit interconnections; integrated circuit metallisation; integrated circuit reliability; voids (solid); 65 nm; BEOL reliability; Cu; ECP additive; SIV formation; additive concentration; additive structure; electromigration lifetime; gap filling pit formation; grain boundary impurity; stress induced voiding; vacancy diffusion barrier; Additives; Copper; Electromigration; Filling; Grain boundaries; Impurities; Life testing; Polymers; Samarium; Thermal stresses;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Interconnect Technology Conference, 2005. Proceedings of the IEEE 2005 International
Print_ISBN :
0-7803-8752-X
Type :
conf
DOI :
10.1109/IITC.2005.1499941
Filename :
1499941
Link To Document :
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