A fully monolithic SiGe quadrature voltage controlled oscillator design for GSM/DCS-PCS applications

Author

Cordeau, D. ; Paillot, J.-M. ; Cam, H. ; De Astis, G. ; Dascalescu, L.

Author_Institution

ACC0, Saint-Germain-En-Laye, France

fYear

2002

fDate

3-4 June 2002

Firstpage

455

Lastpage

458

Abstract

This paper describes the design and optimization in terms of phase noise of a fully monolithic SiGe voltage controlled oscillator (VCO) with quadrature outputs. The proposed circuit is made of two cross-coupled differential VCOs, with integrated resonator, to ensure the quadrature outputs. The quadrature VCO core runs on 13 mA from a 2.7 V power supply. The simulated phase noise is about -140 dBc/Hz at 3 MHz frequency offset almost all over the tuning range. The oscillator is tuned from 1.44 GHz to 1.76 GHz with a tuning voltage varying from 0 to 3 V.

Keywords

Ge-Si alloys; UHF integrated circuits; UHF oscillators; bipolar analogue integrated circuits; cellular radio; circuit simulation; circuit tuning; phase noise; transceivers; voltage-controlled oscillators; 1.44 to 1.76 GHz; 13 mA; 2.7 V; GSM/DCS-PCS application; HBT technology; SiGe; cellular telephony; cross-coupled differential VCO; feedback; fixed loaded quality factor; fully monolithic VCO; integrated resonator; optimization; phase noise; quadrature VCO; transceiver; tuning; Circuit optimization; Circuit simulation; Design optimization; Frequency; Germanium silicon alloys; Phase noise; Power supplies; Silicon germanium; Tuning; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits (RFIC) Symposium, 2002 IEEE

Conference_Location

Seattle, WA, USA

ISSN

1529-2517

Print_ISBN

0-7803-7246-8

Type

conf

DOI

10.1109/RFIC.2002.1012090

Filename

1012090