• DocumentCode
    1839729
  • Title

    PowerPC: a performance architecture

  • Author

    Paap, G. ; Silha, E.

  • Author_Institution
    Motorola Inc., Austin, TX, USA
  • fYear
    1993
  • fDate
    22-26 Feb. 1993
  • Firstpage
    104
  • Lastpage
    108
  • Abstract
    The authors provide an overview of the PowerPC architecture. Some of the issues and decisions that helped shape this architecture are discussed. This architecture has incorporated the needs and ideas of leading software, system, and microprocessor design engineers. With input from this broad spectrum, the designers of PowerPC emerged with an architecture built for high-performance first-generation implementations, while maintaining room for maximum expandability. In addition, the PowerPC architecture was specifically designed to make it possible to implement high-performance single-chip processors. This allows for a balance between maximum performance, ease of manufacturability, and low price.<>
  • Keywords
    microprocessor chips; PowerPC; ease of manufacturability; high-performance single-chip processors; maximum performance; microprocessor design engineers; performance architecture; Computer architecture; Computer industry; Costs; Design engineering; Maintenance engineering; Manufacturing; Operating systems; Power engineering and energy; Programming profession; Shape;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Compcon Spring '93, Digest of Papers.
  • Conference_Location
    San Francisco, CA, USA
  • Print_ISBN
    0-8186-3400-6
  • Type

    conf

  • DOI
    10.1109/CMPCON.1993.289645
  • Filename
    289645