A 5 GHz fast-switching CMOS frequency synthesizer

Author

Xiaomin Yang ; Wu, T. ; McMacken, J.

Author_Institution

Central Florida Univ., Orlando, FL, USA

fYear

2002

fDate

3-4 June 2002

Firstpage

479

Lastpage

482

Abstract

A 5 GHz PLL-based frequency synthesizer for wireless LAN applications is presented in this paper. The proposed PLL is designed using 0.25 /spl mu/m CMOS technology with 3.3 V power supply. The enlarged VCO tuning range gives extra bandwidth to achieve a reduced locking time. The buffer amplifier provides additional gain to compensate the smaller VCO output amplitude level. The phase noise at 1 MHz offset is -120 dBc/Hz, and the power consumption is 30 mW.

Keywords

CMOS analogue integrated circuits; circuit tuning; frequency synthesizers; high-speed integrated circuits; integrated circuit design; integrated circuit noise; phase locked loops; phase noise; voltage-controlled oscillators; wireless LAN; 0.25 micron; 3.3 V; 30 mW; 5 GHz; CMOS technology; PLL-based frequency synthesizer; VCO output amplitude level compensation; bandwidth; buffer amplifier; enlarged VCO tuning range; fast-switching CMOS frequency synthesizer; phase noise; power consumption; power supply voltage; reduced locking time; wireless LAN applications; Bandwidth; CMOS technology; Energy consumption; Frequency synthesizers; Phase locked loops; Phase noise; Power supplies; Tuning; Voltage-controlled oscillators; Wireless LAN;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits (RFIC) Symposium, 2002 IEEE

Conference_Location

Seattle, WA, USA

ISSN

1529-2517

Print_ISBN

0-7803-7246-8

Type

conf

DOI

10.1109/RFIC.2002.1012096

Filename

1012096