Title :
Design and analysis of a multi-layer transformer balun for silicon RF integrated circuits
Author :
Yang, H.Y.D. ; Zhang, L. ; Castaneda, J.A.
Author_Institution :
Broadcom Corp., El Segundo, CA, USA
Abstract :
In this paper, we present the design and analysis of an on-chip transformer balun for silicon RFICs. Both the primary and secondary spread over four metal layers along a common symmetric axis to reduce the overall area, maintaining reasonable quality factor. A five port transformer balun circuit model is developed to facilitate the device simulation. A 4:11 transformer balun is fabricated and tested. It is ideal for LNAs to enhance the gain with optimum noise figure.
Keywords :
CMOS analogue integrated circuits; baluns; high-frequency transformers; integrated circuit noise; microwave amplifiers; microwave integrated circuits; multiport networks; CMOS technology; LNA; common symmetric axis; concentric transformer balun; device simulation; differential amplitude; five port transformer balun circuit model; gain enhancement; high power consumption; metal layers; multi-layer transformer balun; on-chip transformer balun; optimum noise figure; phase balance; quality factor; silicon RFIC; toroidal transformer balun; Circuit simulation; Circuit testing; Costs; Impedance matching; Noise figure; Q factor; Radio frequency; Radiofrequency integrated circuits; Signal design; Silicon;
Conference_Titel :
Radio Frequency Integrated Circuits (RFIC) Symposium, 2002 IEEE
Conference_Location :
Seattle, WA, USA
Print_ISBN :
0-7803-7246-8
DOI :
10.1109/RFIC.2002.1012099
