• DocumentCode
    1840575
  • Title

    Signal integrity optimization of high-speed VLSI packages and interconnects

  • Author

    Zhang, Q.J. ; Wang, F. ; Nakhla, M.S. ; Bandler, J.W. ; Biernacki, R.M.

  • Author_Institution
    Dept. of Electron., Carleton Univ., Ottawa, Ont., Canada
  • fYear
    1998
  • fDate
    25-28 May 1998
  • Firstpage
    1073
  • Lastpage
    1076
  • Abstract
    Signal integrity of high-speed VLSI packages and interconnects is becoming one of the critical issues in an overall system design as the operating frequency in electronic systems such as computers and digital communication systems is going higher and higher. In recent years, research into the VLSI package and interconnect optimization problems has been very active, and important progress has been made. This paper presents the review of recent development in signal integrity oriented optimization of VLSI packages and interconnects. Advanced optimization techniques are also presented with emphasis on large scale optimization and space mapping, a new concept linking engineering models of different types and levels of complexity
  • Keywords
    VLSI; circuit optimisation; high-speed integrated circuits; integrated circuit interconnections; integrated circuit packaging; VLSI interconnects; engineering models; high-speed VLSI packages; interconnect optimization problems; large scale optimization; operating frequency; overall system design; signal integrity optimization; space mapping; Crosstalk; Delay; Design optimization; Digital communication; Electronics packaging; Frequency; Integrated circuit interconnections; Large-scale systems; Time domain analysis; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components & Technology Conference, 1998. 48th IEEE
  • Conference_Location
    Seattle, WA
  • ISSN
    0569-5503
  • Print_ISBN
    0-7803-4526-6
  • Type

    conf

  • DOI
    10.1109/ECTC.1998.678847
  • Filename
    678847