Title :
Intel´s FLEXlogic FPGA architecture
Author_Institution :
Intel Corp., Folsom, CA, USA
Abstract :
Intel´s FLEXlogic field-programmable gate array family is a segmented architecture, SRAM (static random-access memory)-based family with on-chip nonvolatile memory. The architecture is quick to learn and easy to use for designers with standard PLD experience. Devices are organized into configurable function blocks (CFBs). Each CFB can be configured as a PLD block or as a bank of SRAMs. CFBs configured as PLD blocks include advanced features that provide significant design flexibility and high integration. Truly predictable timing simplifies the design and simulation process. The inherent speed of the FLEXlogic FPGA family, together with its selectable 3.3-V or 5-V I/O, allows it to be used in areas where previous FPGA architectures cannot operate. The iFX780, the first member of the family, illustrates the architecture.<>
Keywords :
SRAM chips; computer architecture; logic arrays; 3.3 V; 5.5 V; FPGA architecture; Intel FLEXlogic; PLD blocks; SRAM; configurable function blocks; design flexibility; field-programmable gate array; high integration; iFX780; on-chip nonvolatile memory; predictable timing; segmented architecture; selectable I/O voltage; simulation process; static random-access memory; Field programmable gate arrays; Logic arrays; Logic devices; Memory architecture; Nonvolatile memory; Pins; Process design; Programmable logic devices; Random access memory; Timing;
Conference_Titel :
Compcon Spring '93, Digest of Papers.
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-8186-3400-6
DOI :
10.1109/CMPCON.1993.289700
