DocumentCode
1840746
Title
Adaptive Rapid Reconfigurable Algorithm for Low Power Cache
Author
ManMan Peng ; Xiaofeng Liu
Author_Institution
Dept. of Inf. Sci. & Eng., Hunan Univ., Changsha, China
fYear
2013
fDate
21-23 June 2013
Firstpage
203
Lastpage
206
Abstract
As cache is the main energy- consuming component of a processor, how to improve its performance and reduce its power consumption has become the key of the study. In this paper, an adaptive rapid reconfigurable cache algorithm was proposed, by analyzing and comparing the characteristics of program segments and adopting the method of pre_reconfiguration, cache´s capacity and associativity can be adjusted quickly when the phase changes. The result of the experiments shows that compared with the traditional fixed cache, the proposed algorithm can reduce power consumption by 40% and the performance loss is not more than 3%. Compared with Tourament cache, the algorithm has optimized both the performance and the power consumption of cache.
Keywords
cache storage; content-addressable storage; low-power electronics; power consumption; adaptive rapid reconfigurable cache algorithm; associativity; cache capacity; energy-consuming component; fixed cache; low power cache; power consumption reduction; processor; program segments; Algorithm design and analysis; Arrays; Energy consumption; Heuristic algorithms; IEEE Computer Society; Optimization; Power demand; Cache; instruction working set; low_ power; reconfigurable;
fLanguage
English
Publisher
ieee
Conference_Titel
Computational and Information Sciences (ICCIS), 2013 Fifth International Conference on
Conference_Location
Shiyang
Type
conf
DOI
10.1109/ICCIS.2013.61
Filename
6642976
Link To Document