DocumentCode :
1840810
Title :
Microcontroller acceleration
Author :
Jenkins, J.
fYear :
1993
fDate :
22-26 Feb. 1993
Firstpage :
416
Lastpage :
424
Abstract :
Presents the design of an accelerator that increases microcontroller performance without resorting to multiple expensive high-speed memory chips or a high-cost superscalar controller. The design of a data acquisition unit, similar to a logic analyzer, is presented as an example. The task of the analyzer is to capture and respond to data, sampled at a rate faster that that at which the microcontroller can operate. Data capture is a hardware-intensive function-it is difficult using software to synchronize controller operations with external data and balance memory requirements. On the other hand, formatting captured data and outputting it for display are best done in software. The accelerator exploits these characteristics by using a programmable logic device with the microcontroller. This partitions data acquisition and display into fast hardware-intensive and slower, software-intensive functions.<>
Keywords :
data acquisition; logic arrays; microcontrollers; data acquisition unit; data capture; data formatting; data output; hardware-intensive function; logic analyzer; memory requirements; microcontroller acceleration; microcontroller performance; programmable logic device; sampling rate; software-intensive functions; synchronization; Acceleration; Arithmetic; Coprocessors; Data acquisition; Displays; Engines; Graphics; Hardware; Microcontrollers; Microprocessors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Compcon Spring '93, Digest of Papers.
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-8186-3400-6
Type :
conf
DOI :
10.1109/CMPCON.1993.289706
Filename :
289706
Link To Document :
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